TIE-50106 Digital Design, 5 cr


Sakari Lahti, Timo D. Hämäläinen


Toteutuskerta Periodi Vastuuhenkilö Suoritusvaatimukset
TIE-50106 2019-01 1 - 2 Timo D. Hämäläinen
Sakari Lahti
Passing the compulsory exercises and exam.


This course gives knowledge of specification, design, implementation and analysis of digital systems. Students learn to know the theory of combinatorial and sequential systems, especially the design of state machines. Students master state-of-the art design tools, and can select the best specification and implementation description for typical design tasks. FPGA platforms are used to carry out real implementations. After the course, students can implement real FPGA-based digital systems.


Sisältö Ydinsisältö Täydentävä tietämys Erityistietämys
1. Specification, design and analysis of synchronous logic. Different levels of description abstractions in digital system.  The Y-model: behaviour, architecture and mapping. Hierarchical design.   
2. Combinatorial gate networks. Two and multi-level gate networks. Critical path.  Propagation delay. Fan-in and fan-out. Loading of the gates.   
3. Sequential networks. Mealy and Moore state machines. Timing analysis and determination of clock speed.  Extended state machines with memory. Registered state machine.  Equivalent state machines. 
4. Standard modules. Connecting modules using bus structures. data and control paths. Register Transfer Level.  Centralized and distributed bus arbitration. Core modules of a processor. Adjusting the level of parallelism in execution.  Network-on-Chip 
5. FPGA architecture and usage in digital design. Design tools and methodologies.  FPGA boards with peripherals. Practical designs.  FPGA as a platform for own processors. Simulators. 

Ohjeita opiskelijalle osaamisen tasojen saavuttamiseksi

Participation to lectures as well as compulsory paper and computer/FPGA exrcises. Bonus points credited to exam points are available for exrcise tasks. Kurssin arvosana määräytyy tentin ja osasuorituspisteiden perusteella.


Numerical evaluation scale (0-5)


Completion parts must belong to the same implementation


Tyyppi Nimi Tekijä ISBN URL Lisätiedot Tenttimateriaali
Book   Introduction to Digital Systems   Ercegovac, Lang, Moreno   471527998       Yes   
Lecture slides     Hämäläinen         Yes   
Other online content   Video lectures   Sakari Lahti         No   


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TIE-50106 Digital Design, 5 cr TIE-50100 Digital Design, 5 cr  

Päivittäjä: Lahti Sakari, 06.04.2020