Making the next generation of virtual reality graphics possible.
Virtual reality and Graphics Architectures (VGA) group
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About

Welcome to the home page of the Virtual reality and Graphics Architectures (VGA) research group in Tampere University. The VGA group is active in graphics research since 2015, building on long experience of Tampere University of Technology on Customized Parallel Computing platforms. Our research aims to make photorealistic graphics algorithms such as path tracing fast enough for real-time rendering.

Path tracing can produce visually pleasing and realistic frame sequences of 3D worlds. However, it is computationally demanding and therefore real-time path tracing is currently limited to powerful desktop computers. Our research aims to enable photorealistic rendering in mobile devices with restrictive power and energy budgets by exploring new graphics hardware architectures and software systems.


Members

Assistant Professor

Pekka
Jääskeläinen

Postdoctoral
Researcher

Markku
Mäkitalo

Doctoral Student

Matias
Koskela

Doctoral Student

Joonas
Multanen

Doctoral Student

Heikki
Kultala

Research Assistant

Atro
Lotvonen

Research Assistant

Petrus
Kivi

Research Assistant

Julius
Ikkala


Former long time members

Name
Next job after VGA
Jarmo Takala
Provost at Tampere University
Timo Viitanen
Senior System Software Engineer at NVIDIA
Kalle Immonen
Software Developer at Vincit

Publications

Journal Articles

PLOCTree: A Fast, High-Quality Hardware BVH Builder

2018, Viitanen, T., Koskela, M., Jääskeläinen, P., Tervo, A., and Takala, J., In Proceedings of the ACM on Computer Graphics and Interactive Techniques 1, 2, Article 35 (August 2018).

Instantaneous foveated preview for progressive Monte Carlo rendering

2018, Koskela, M., Immonen, K., Viitanen, T., Jääskeläinen, P., Multanen, J., and Takala, J., In Springer Computational Visual Media, 4th of April 2018.

MergeTree: A Fast Hardware HLBVH Constructor for Animated Ray Tracing

2017, Viitanen, T., Koskela, M., Jääskeläinen, P., Kultala, H., and Takala, J., In ACM Transactions on Graphics (TOG), Volume 36 Issue 5.

Fast Hardware Construction and Refitting of Quantized Bounding Volume Hierarchies

2017, Viitanen, T., Koskela, M., Jääskeläinen, P., Immonen, K. and Takala, J., In Computer Graphics Forum, Volume 36 Issue 4.


Conference Proceedings

Reducing Computational Complexity of Real-Time Stereoscopic Ray Tracing with Spatiotemporal Sample Reprojection

2019, Mäkitalo, M., Kivi, P., Koskela, M., and Jääskeläinen, P., Accepted to the Proceedings of the 14th International Conference on Computer Graphics Theory and Applications (GRAPP).

Sparse Sampling for Real-Time Ray Tracing

2018, Viitanen, T., Koskela, M., Immonen, K., Mäkitalo, M., Jääskeläinen, P. and Takala, J., In Proceedings of the 13th International Conference on Computer Graphics Theory and Applications (GRAPP).

Foveated Instant Preview for Progressive Rendering

2017, Koskela, M., Immonen, K., Viitanen, T., Jääskeläinen, P., Multanen, J. and Takala, J., ACM SIGGRAPH Asia Technical Briefs.

Foveated Path Tracing: A Literature Review and a Performance Gain Analysis

2016, Koskela, M., Viitanen, T., Jääskeläinen, P. and Takala, J., In Proceedings of the 12th International Symposium on Visual Computing (ISVC)

Multi Bounding Volume Hierarchies for Ray Tracing Pipelines

2016, Viitanen, T., Koskela, M., Jääskeläinen, P. and Takala, J., ACM SIGGRAPH Asia Technical Briefs.

Half-Precision Floating-Point Ray Traversal

2016, Koskela, M., Viitanen, T., Jääskeläinen, P. and Takala, J., In Proceedings of the 11th International Conference on Computer Graphics Theory and Applications (GRAPP).

MergeTree: A HLBVH Constructor for Mobile Systems

2015, Viitanen, T., Koskela, M., Jääskeläinen, P., Kultala, H., and Takala, J., ACM SIGGRAPH Asia Technical Briefs.

Using Half-Precision Floating-Point Numbers for Storing Bounding Volume Hierarchies

2015, Koskela, M., Viitanen, T., Jääskeläinen, P., Takala, J., and Cameron, K., In Proceedings of the 32nd Computer Graphics International Conference (CGI).

Programmable and Scalable Architecture for Graphics Processing Units

2009, Lama, C., Jääskeläinen, P., and Takala, J., In Proceedings of the International Conference on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS).


Theses

Hardware Accelerators for Animated Ray Tracing

2018, Viitanen, T., Doctoral dissertation, Tampere University of Technology.

Real-Time Noise Removal in Foveated Path Tracing

2017, Immonen, K., Master of Science thesis, Tampere University of Technology.

Software-Based Ray Tracing for Mobile Devices

2015, Koskela, M., Master of Science thesis, Tampere University of Technology.

Supervised Theses

Title
Author(s)
Augmented Reality Framework and Demonstrator
2018, Rasti, D. & Rasti, A., Master of Science thesis
Simplification of 3D Computer-aided Design Models to Improve Rendering Performance
2019, Heinonen, A., Master of Science thesis

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